To the IT guys out there,
I read in the Comp TIA book that PCI-e uses a point to point serial connection, as opposed to PCI's parallel communication, to connect a PCI-e device to the PCI-e bus and thus the external data bus. This basically means that bits are transferred using a pair of wires (a lane) as opposed to traveling across 32 wires (parallel communication).
The book says that bits have to get from device to device at the same time or else they need "high speed checking of the data," so it's difficult to make parallel communication bits move faster and get faster results. This is not a problem with serial communication, which gives it the ability to shoot bits back and forth a lot faster.
However, if PCI-e can use up to 16 lanes, wouldn't that imply that it's using some kind of parallel communication? The book doesn't go into detail about this.