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Interchangable Chip/Chipsets


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#1 Kaneal

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Posted 13 February 2013 - 06:03 AM

does anyone know where to get a mobo with interchangable chipsets :/ iv been looking alot custom motherboards might be the only way

 

also iv been thinking is there other MoBo out there that take diffrent Processors like crusoe processor or VLIW processor


Edited by hamluis, 13 February 2013 - 02:30 PM.
Merged topics - Hamluis.


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#2 killerx525

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Posted 13 February 2013 - 06:05 AM

Those things don't exist for consumers, i don't even think it's possible.


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#3 Kaneal

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Posted 13 February 2013 - 06:06 AM

VLIW Processor from wikipedia,org


 

 


 

Very long instruction word or VLIW refers to a processor architecture designed to take advantage of

instruction level parallelism (ILP). Whereas conventional processors mostly only allow programs that specify instructions to be executed one after another, a VLIW processor allows programs that can explicitly specify instructions to be executed at the same time (i.e. in parallel). This type of processor architecture is intended to allow higher performance without the inherent complexity of some other approaches.


 

Traditional approaches to improving performance in processor architectures include breaking up instructions into sub-steps so that instructions can be executed partially at the same time (pipelining), dispatching individual instructions to be executed completely independently in different parts of the processor (superscalar architectures), and even executing instructions in an order different from the program (out-of-order execution). These approaches all involve increased hardware complexity (higher cost, larger circuits, higher power consumption) because the processor must intrinsically make all of the decisions internally for these approaches to work. The VLIW approach, by contrast, depends on the programs themselves providing all the decisions regarding which instructions are to be executed simultaneously and how conflicts are to be resolved. As a practical matter this means that the compiler software (the software used to create the final programs) becomes much more complex, but the hardware is simpler than many other approaches to parallelism.


 

As is the case with any novel architectural approach, the concept is only as useful as code generation makes it. An architecture designed for use in signal processing may have a number of special-purpose instructions to facilitate certain complicated operations such as fast Fourier transform (FFT) computation or certain calculations that recur in tomographic contexts. However, these optimized capabilities are useless unless compilers are able to spot relevant source code constructs and generate target code that duly utilizes the CPU's advanced offerings. Therefore, programmers must be able to express their algorithms in a manner that makes the compiler's task easier.






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